Semiconductor manufacturing, such as the fabrication of integrated circuits, typically entails the use of photolithography. A semiconductor substrate on which circuits are being formed, usually a silicon wafer, is coated with a material, such as a photoresist, that changes solubility when exposed to radiation. A lithography tool, such as a mask or reticle, positioned between the radiation source and the semiconductor substrate casts a shadow to control which areas of the substrate are exposed to the radiation. After the exposure, the photoresist is removed from either the exposed or the unexposed areas, leaving a patterned layer of photoresist on the wafer that protects parts of the wafer during a subsequent etching or diffusion process.
The photolithography process allows multiple integrated circuit devices or electromechanical devices, often referred to as “chips,” to be formed on each wafer. The wafer is then cut up into individual dies, each including a single integrated circuit device or electromechanical device. Ultimately, these dies are subjected to additional operations and packaged into individual integrated circuit chips, electromechanical devices, or read write components in data storage drives.
Due to the extremely small tolerances of the optical system, an entire wafer is not exposed at once during projection printing. Instead, adjacent portions of the wafer are exposed sequentially. After a portion of the wafer is exposed, the optical system is moved to a next position by means of a motor drive and the next portion of the wafer is exposed. A photolithographic projection printer of this type is called a “stepping printer” or a “wafer stepper.” Another exposure method involves the scanning of a line across the wafer while the wafer is moved continuously. A photolithographic projection printer of this type is called a “wafer scanner.”
At each step, the alignment of the mask and the wafer must be carried out with high accuracy before exposure. To perform the alignment, the wafer has marks for position detection, commonly referred to as alignment marks, which are formed on a wafer in an early lithography process. Alignment marks typically consist of narrow bars or gratings oriented to provide x and y positioning information. The alignment mark is often printed in the kerf, the narrow space between chips on the wafer. Since many equipment manufacturers use different types of alignment marks at different locations, it is not uncommon for several different types of alignment marks to be formed on the same wafer.
During the masking process, the wafer stepper uses alignment marks to precisely align the mask with the desired portion of the wafer. Typically, a laser alignment beam is directed at an appropriate alignment mark. The wafer stepper “reads” the resulting diffraction pattern, and adjusts the relative positions of the wafer and the photolithographic mask so that the pattern for the photolithographic mask are transferred to the wafer in the precise location desired. The marks are usually read at each masking step so each subsequent mask is aligned to the same mark.
During the semiconductor manufacturing process, alignment marks can easily become contaminated or covered with various process materials. In such instances, it is necessary to clean the alignment marks on the wafer before any subsequent processing occurs to ensure proper alignment of the wafer on the process equipment.
For example, the manufacture of modem integrated circuit structures typically requires multiple metallization layers in order to achieve the desired density of circuit elements in the structure. These layers of metal film are typically opaque or highly reflective. As the surface of the wafer is covered with each successive metallization layer, the alignment marks are typically also covered and can no longer be read by the wafer stepper. Before any additional processing can occur, the alignment marks must be uncovered.
This process of uncovering or cleaning the alignment marks is commonly referred to as “target recovery,” and is typically accomplished with an additional photolithography step. However, the additional mask and etch steps, plus the attendant cleaning and inspection steps, undesirably increase cycle time and process complexity. In fact, uncovering an alignment mark using a traditional photolithography process (spin, expose, develop, bake, etch, ash, clean) can delay continued processing of a wafer for up to 8 hours, and must be repeated with each additional occluding metallization layer.
One method of avoiding these additional photolithography steps is described in U.S. Pat. No. 5,456,756 to Ramaswami et al. for “Holding apparatus, a metal deposition system, and a wafer processing method which preserve topographical marks on a semiconductor wafer.” In this system, shielding tabs on the clamp ring used to hold wafers in place during material deposition are used to shield the alignment marks during material deposition. This shielding prevents material from being deposited over the alignment marks and obscuring the alignment marks. Unfortunately, this method can cause a number of problems during the semiconductor manufacturing process, including delamination, uneven films, and wafer-edge peeling. These problems are especially significant in the context of mass production manufacturing of semiconductor chips.
Another approach is described in U.S. Pat. No. 5,405,810 to Mizuno et al. for “Alignment Method and Apparatus.” Mizuno et al. describes the use of an energy beam and gas-assisted etching to remove a predetermined portion of a film covering an alignment mark. However, this method also suffers from several shortcomings that make it less suitable for mass production manufacturing. First, the use of gas assisted etching necessarily requires the use of a gas-delivery system. Any energy beam system with such a gas delivery system will be more complex than a system without a gas delivery system. Greater complexity tends to reduce the reliability of such a system and make it less suitable for use in mass production. A system that requires a gas delivery system will also tend to be physically larger than a system without a gas delivery system. Smaller systems are desirable because most manufacturing takes place in a clean room, and the cost of clean room space is extremely high. Further, the gases used in this type of system are typically toxic and/or corrosive, which causes difficulty in handling and storage. Such gases can also degrade the components in the vacuum system.